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U.S. Patents Awarded to Inventors in Oregon (Aug. 27)(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Aug. 27 -- The following federal patents were awarded to inventors in Oregon. *** Intel Assigned Patent for Control of On-die System Fabric Blocks ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,388) developed by five co-inventors for the "control of on-die system fabric blocks." The co-inventors are Zhen Fang, Portland, Oregon, Mahesh Wagh, Portland, Oregon, Jasmin Ajanovic, Portland, Oregon, Michael E. Espig, Newberg, Oregon, and Ravishankar Iyer, Portland, Oregon. The patent application was filed on July 17, 2012 (13/550,966). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,388.PN.&OS=PN/8,819,388&RS=PN/8,819,388 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for User Equipment and Method for Adaptive Selection of Handover Parameters in Wireless-access Networks ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,818,376) developed by Candy Yiu, Portland, Oregon, and Mo-Han Fong, Sunnyvale, California, for a "user equipment and method for adaptive selection of handover parameters in wireless-access networks." The patent application was filed on Aug. 8, 2012 (13/569,443). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,376.PN.&OS=PN/8,818,376&RS=PN/8,818,376 Written by Sudarshan Harpal; edited by Jaya Anand. *** Pacesetter Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Pacesetter, Sylmar, California, has been assigned a patent (8,818,510) developed by Gene A. Bornzin, Simi Valley, California, and Joseph J. Florio, Bend, Oregon, for "systems and methods for paired/coupled pacing." The patent application was filed on Dec. 10, 2009 (12/635,474). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,510.PN.&OS=PN/8,818,510&RS=PN/8,818,510 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent for AC Adaptor Minimization Through Active Platform Power Consumption Management ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,816,539) developed by James G. Hermerding II, San Jose, California, Jorge P. Rodriguez, Portland, Oregon, and Vasudevan Srinivasan, Hillsboro, Oregon, for "AC adaptor minimization through active platform power consumption management." The patent application was filed on June 30, 2010 (12/827,656). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,816,539.PN.&OS=PN/8,816,539&RS=PN/8,816,539 Written by Kusum Sangma; edited by Jaya Anand. *** Intel Assigned Patent for Controlling Virtual Machines Based on Performance Counters ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,699) developed by four co-inventors for "controlling virtual machines based on performance counters." The co-inventors are Erik C. Cota-Robles, Mountain View, California, Steven M. Bennett, Hillsboro, Oregon, Andrew V. Anderson, Hillsboro, Oregon, and Sebastian Schoenberg, Hillsboro, Oregon. The patent application was filed on Dec. 29, 2006 (11/618,446). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,699.PN.&OS=PN/8,819,699&RS=PN/8,819,699 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Instruction and Logic for Processing Text Strings ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,394) developed by five co-inventors for the "instruction and logic for processing text strings." The co-inventors are Michael A. Julier, Hillsboro, Oregon, Jeffrey D. Gray, Portland, Oregon, Srinivas Chennupaty, Portland, Oregon, Sean P. Mirkes, Beaverton, Oregon, and Mark P. Seconi, Beaverton, Oregon. The patent application was filed on Dec. 20, 2012 (13/721,725). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,394.PN.&OS=PN/8,819,394&RS=PN/8,819,394 Written by Balkishan Dalai; edited by Jaya Anand. *** Nanometrics Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Nanometrics, Milpitas, California, has been assigned a patent (8,818,754) developed by Boris V. Kamenev, Beaverton, Oregon, and Michael J. Darwin, Portland, Oregon, for "thin films and surface topography measurement using reduced library." The patent application was filed on May 20, 2011 (13/112,821). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,754.PN.&OS=PN/8,818,754&RS=PN/8,818,754 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent for Chip Packages Including Through-silicon Via Dice with Vertically Integrated Phased-array Antennas ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,816,906) developed by Telesphor Kamgaing, Chandler, Arizona, Valluri R. Rao, Saratoga, California, and Yorgos Palaskas, Portland, Oregon, for "chip packages including through-silicon via dice with vertically integrated phased-array antennas and low-frequency and power delivery substrates." The patent application was filed on May 5, 2011 (13/101,883). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,816,906.PN.&OS=PN/8,816,906&RS=PN/8,816,906 Written by Kusum Sangma; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,817,908) developed by Kent C. Lusted, Aloha, Oregon, for "generating and/or receiving, at least in part, signal that includes at least one waveform." The patent application was filed on April 16, 2012 (13/447,774). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=88,17,908.PN.&OS=PN/88,17,908&RS=PN/88,17,908 Written by Amal Ahmed; edited by Jaya Anand. *** Intel Assigned Patent for Methods and Apparatus for Protecting Digital Content ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,426) developed by Priyadarsini Devanand, San Jose, California, and Gary L. Graunke, Hillsboro, Oregon, for "methods and apparatus for protecting digital content." The patent application was filed on Dec. 28, 2011 (13/338,371). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,426.PN.&OS=PN/8,819,426&RS=PN/8,819,426 Written by Balkishan Dalai; edited by Jaya Anand. *** Reso Holdings Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Reso Holdings, San Francisco, has been assigned a patent (8,818,834) developed by five co-inventors for a "system and method for automated community schedule management." The co-inventors are Rob Rastovich, Bend, Oregon, David Ehrlich, San Francisco, Mark Cashman, San Jose, California, Suzanne Dryan Felson, San Francisco, and Rita Jenkins, San Francisco. The patent application was filed on Jan. 9, 2013 (13/737,038). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,834.PN.&OS=PN/8,818,834&RS=PN/8,818,834 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent for Methods and Apparatus for Modulating Light to Concurrently Convey High Rate Data and Low Rate Data ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,818,204) developed by Richard D. Roberts, Hillsboro, Oregon, for "methods and apparatus for modulating light to concurrently convey high rate data and low rate data." The patent application was filed on April 30, 2012 (13/460,224). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,204.PN.&OS=PN/8,818,204&RS=PN/8,818,204 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent for Providing Metadata in Translation Lookaside Buffer (TLB) ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,392) developed by six co-inventors for "providing metadata in a translation lookaside buffer (TLB)." The co-inventors are David Champagne, Princeton, New Jersey, Abhishek Tiwari, Urbana, Illinois, Wei Wu, Hillsboro, Oregon, Christopher J. Hughes, San Jose, California, Sanjeev Kumar, San Jose, California, and Shih-Lien Lu, Portland, Oregon. The patent application was filed on July 17, 2012 (13/550,817). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,392.PN.&OS=PN/8,819,392&RS=PN/8,819,392 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Active Training of Memory Command Timing ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,474) developed by four co-inventors for the "active training of memory command timing." The co-inventors are Theodore Z. Schoenborn, Portland, Oregon, John V. Lovelace, Irmo, South Carolina, Christopher P. Mozak, Beaverton, Oregon, and Bryan L. Spry, Portland, Oregon. The patent application was filed on April 3, 2009 (12/417,828). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,474.PN.&OS=PN/8,819,474&RS=PN/8,819,474 Written by Balkishan Dalai; edited by Jaya Anand. *** Cypress Semiconductor Assigned Patent for Integrated Circuit Device with Programmable Blocks and Analog Circuit Control ALEXANDRIA, Va., Aug. 27 -- Cypress Semiconductor, San Jose, California, has been assigned a patent (8,816,890) developed by five co-inventors for an "integrated circuit device with programmable blocks and analog circuit control." The co-inventors are Jean-Paul Vanitegem, San Jose, California, Haneef Mohammed, Beaverton, Oregon, Hans Klein, Pleasanton, California, Harold M. Kutz, Edmonds, Washington, and Ata Khan, Saratoga, California. The patent application was filed on April 9, 2013 (13/859,621). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,816,890.PN.&OS=PN/8,816,890&RS=PN/8,816,890 Written by Kusum Sangma; edited by Jaya Anand. *** Intel Assigned Patent for Device, System and Method of Discovering Wireless Communication Devices ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,818,278) developed by four co-inventors for a "device, system and method of discovering wireless communication devices." The co-inventors are Elad Levy, Nes Ziona, Israel, Ofir Artstain, Netanya, Israel, Solomon Trainin, Haifa, Israel, and Carlos Cordeiro, Portland, Oregon. The patent application was filed on June 27, 2012 (13/534,023). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,278.PN.&OS=PN/8,818,278&RS=PN/8,818,278 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,857) developed by Naga Gurumoorthy, Portland, Oregon, Arvind Kumar, Beaverton, Oregon, and Matthew J. Parker, Hillsboro, Oregon, for an "apparatus and method to harden computer system." The patent application was filed on Feb. 24, 2012 (13/404,628). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,857.PN.&OS=PN/8,819,857&RS=PN/8,819,857 Written by Balkishan Dalai; edited by Jaya Anand. *** Qualcomm Assigned Patent for Systems, Methods, and Machine-readable Media Providing Location-enabled Group Management ALEXANDRIA, Va., Aug. 27 -- Qualcomm, San Diego, has been assigned a patent (8,818,439) developed by Richard P. Davis, Escondido, California, Kristin W. Peri, Portland, Oregon, and Thomas Francis Doyle, San Diego, for "systems, methods, and machine-readable media providing location-enabled group management." The patent application was filed on Oct. 2, 2013 (14/044,788). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,439.PN.&OS=PN/8,818,439&RS=PN/8,818,439 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent for Simulation of Web Applications and Secondary Devices in Web Browser, Web Application Development Tools, and Methods Using Same ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,624) developed by Zhaorong Hou, Portland, Oregon, for the "simulation of web applications and secondary devices in a web browser, web application development tools, and methods using the same." The patent application was filed on Sept. 26, 2011 (13/245,272). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,624.PN.&OS=PN/8,819,624&RS=PN/8,819,624 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent for Field Effect Transistor with Narrow Bandgap Source and Drain Regions and Method of Fabrication ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,816,394) developed by six co-inventors for a "field effect transistor with narrow bandgap source and drain regions and method of fabrication." The co-inventors are Robert S. Chau, Portland, Oregon, Suman Datta, Beaverton, Oregon, Jack Kavalieros, Portland, Oregon, Justin K. Brask, Portland, Oregon, Mark L. Doczy, Portland, Oregon, and Matthew Metz, Portland, Oregon. The patent application was filed on Dec. 20, 2013 (14/137,804). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,816,394.PN.&OS=PN/8,816,394&RS=PN/8,816,394 Written by Kusum Sangma; edited by Jaya Anand. *** Intel Assigned Patent for Method and Apparatus for Faster Global Positioning System (GPS) Location Using Pre-computed Spatial Location for Tracking GPS Satellites ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,816,903) developed by Uttam Sengupta, Portland, Oregon, Sanjay Bakshi, Beaverton, Oregon, and Shriharsha Hedge, Beaverton, Oregon, for a "method and apparatus for faster global positioning system (GPS) location using a pre-computed spatial location for tracking GPS satellites." The patent application was filed on Dec. 20, 2011 (13/332,236). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,816,903.PN.&OS=PN/8,816,903&RS=PN/8,816,903 Written by Kusum Sangma; edited by Jaya Anand. *** Intel Assigned Patent for Parallelized Counter Tree Walk for Low Overhead Memory Replay Protection ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,455) developed by seven co-inventors for the "parallelized counter tree walk for low overhead memory replay protection." The co-inventors are Siddhartha Chhabra, Hillsboro, Oregon, Uday R. Savagaonkar, Portland, Oregon, David M. Durham, Beaverton, Oregon, Niranjan L. Cooray, Folsom, California, Men Long, Beaverton, Oregon, Carlos V. Rozas, Portland, Oregon, and Alpa T. Narendra Trivedi, Hillsboro, Oregon. The patent application was filed on Oct. 5, 2012 (13/646,105). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,455.PN.&OS=PN/8,819,455&RS=PN/8,819,455 Written by Balkishan Dalai; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,818,426) developed by Puneet Jain, Hillsboro, Oregon, Meghashree Dattatri Kedalagudde, Hillsboro, Oregon, and Muthaiah Venkatachalam, Beaverton, Oregon, for "scalable transmission or device trigger requests." The patent application was filed on Sept. 27, 2012 (13/628,935). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,818,426.PN.&OS=PN/8,818,426&RS=PN/8,818,426 Written by Sudarshan Harpal; edited by Jaya Anand. *** Intel Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Intel, Santa Clara, California, has been assigned a patent (8,819,306) developed by four co-inventors for a "general input/output architecture with PCI express protocol with credit-based flow control." The co-inventors are Jasmin Ajanovic, Portland, Oregon, David Harriman, Portland, Oregon, Blaise Fanning, Folsom, California, and David Lee, Portland, Oregon. The patent application was filed on Dec. 28, 2012 (13/729,673). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,306.PN.&OS=PN/8,819,306&RS=PN/8,819,306 Written by Deviprasad Jena; edited by Jaya Anand. *** Synopsys Assigned Patent ALEXANDRIA, Va., Aug. 27 -- Synopsys, Mountain View, California, has been assigned a patent (8,819,094) developed by four co-inventors for a "multiplicative division circuit with reduced area." The co-inventors are Kyung-Nam Han, Portland, Oregon, Alexandre Tenca, Beaverton, Oregon, David Tran, Beaverton, Oregon, and Rick Kelly, Beaverton, Oregon. The patent application was filed on June 22, 2009 (12/488,956). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,094.PN.&OS=PN/8,819,094&RS=PN/8,819,094 Written by Deviprasad Jena; edited by Jaya Anand. *** Yahoo! Assigned Patent for Query Refinement Based on User Selections ALEXANDRIA, Va., Aug. 27 -- Yahoo!, Sunnyvale, California, has been assigned a patent (8,819,003) developed by Peter Anick, Marlborough, Massachusetts, Ryan Grove, Portland, Oregon, and Jeremy Hubert, San Francisco, for "query refinement based on user selections." The patent application was filed on April 23, 2013 (13/868,104). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,819,003.PN.&OS=PN/8,819,003&RS=PN/8,819,003 Written by Deviprasad Jena; edited by Jaya Anand. For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; [email protected]; http://targetednews.com. -1173610 (c) 2014 Targeted News Service |